1. Field of the Invention
Embodiments of this invention relate generally to computers, and, more particularly, to a method and apparatus to improve the efficiency of debugging a processor.
2. Description of Related Art
System-on-chip devices (SOCs) are well-known, These devices generally include a processor, one or more modules, bus interfaces, memory devices, and one or more system buses for communicating information. When designing, testing, and checking the microcomputer, it is useful to operate the SOC in a mode so that problems with programs executing on the microcomputer can be identified and corrected. This process of problem identification and correction is known as “debugging.” Because multiple modules and their communications occur internally to the chip, access to this information is generally difficult when problems occur in software or hardware. Thus, debugging on these systems is not straightforward. As a result of development of these SOCs, specialized debugging systems have been developed to monitor performance and trace information on the chip. Such systems typically include dedicated hardware or software such as a debug tool and debug software, which accesses a processor through serial communications.
While these debugging methods have been proven effective, they have not been very useful for issues that may arise during the early stages of the microcomputer's bring-up process. In this case, it is often difficult to quickly determine a root cause of a problem due to the limited visibility to the SOC during this stage of testing. As a result, test engineers are generally limited to a trial and error approach, where the engineer tries a variety of seemingly random approaches to root cause the problem with limited substantive real guidance.